`timescale 1ns/1ps

//CLINT
`define MTIME_ADDR    64'h00000000_0200bff8
`define MTIMECMP_ADDR 64'h00000000_02004000

//no_use
`define NO_USE 64'd0

//command
`define MRET           8'hfd
`define DIFF_TRAP      8'hfe
`define DIFF_UART      8'hff
`define NO_INSTRUCTION 8'd0 

`define LUI            8'd1 
`define AUIPC          8'd2 
`define JAL            8'd3 
`define JALR           8'd4 
`define BEQ            8'd5 
`define BNE            8'd6 
`define BLT            8'd7 
`define BGE            8'd8 
`define BLTU           8'd9 
`define BGEU           8'd10
`define LB             8'd11
`define LH             8'd12
`define LW             8'd13
`define LBU            8'd14
`define LHU            8'd15
`define SB             8'd16
`define SH             8'd17
`define SW             8'd18
`define ADDI           8'd19
`define SLTI           8'd20
`define SLTIU          8'd21
`define XORI           8'd22
`define ORI            8'd23
`define ANDI           8'd24
`define SLLI           8'd25    //64_changed
`define SRLI           8'd26    //64_changed
`define SRAI           8'd27    //64_changed
`define ADD            8'd28
`define SUB            8'd29
`define SLL            8'd30    //64_changed
`define SLT            8'd31
`define SLTU           8'd32
`define XOR            8'd33
`define SRL            8'd34    //64_changed
`define SRA            8'd35    //64_changed
`define OR             8'd36
`define AND            8'd37
`define FENCE          8'd38
`define ECALL          8'd39
`define EBREAK         8'd40
//RV64
`define LWU            8'd41
`define LD             8'd42
`define SD             8'd43
`define ADDIW          8'd44
`define SLLIW          8'd45
`define SRLIW          8'd46
`define SRAIW          8'd47
`define ADDW           8'd48
`define SUBW           8'd49
`define SLLW           8'd50
`define SRLW           8'd51
`define SRAW           8'd52
//fence.i
`define FENCE_I        8'd53
//csr
`define CSRRW          8'd54
`define CSRRS          8'd55
`define CSRRC          8'd56
`define CSRRWI         8'd57
`define CSRRSI         8'd58
`define CSRRCI         8'd59

//AXI4
`define AXI_ADDR_WIDTH 64
`define AXI_DATA_WIDTH 64
`define AXI_ID_WIDTH   4
`define AXI_USER_WIDTH 1

`define SIZE_B         2'b00
`define SIZE_H         2'b01
`define SIZE_W         2'b10
`define SIZE_D         2'b11

//command
`define REQ_READ       1'b0
`define REQ_WRITE      1'b1

// Burst types
`define AXI_BURST_TYPE_FIXED                              2'b00
`define AXI_BURST_TYPE_INCR                               2'b01
`define AXI_BURST_TYPE_WRAP                               2'b10
// Access permissions
`define AXI_PROT_UNPRIVILEGED_ACCESS                      3'b000
`define AXI_PROT_PRIVILEGED_ACCESS                        3'b001
`define AXI_PROT_SECURE_ACCESS                            3'b000
`define AXI_PROT_NON_SECURE_ACCESS                        3'b010
`define AXI_PROT_DATA_ACCESS                              3'b000
`define AXI_PROT_INSTRUCTION_ACCESS                       3'b100
// Memory types (AR)
`define AXI_ARCACHE_DEVICE_NON_BUFFERABLE                 4'b0000
`define AXI_ARCACHE_DEVICE_BUFFERABLE                     4'b0001
`define AXI_ARCACHE_NORMAL_NON_CACHEABLE_NON_BUFFERABLE   4'b0010
`define AXI_ARCACHE_NORMAL_NON_CACHEABLE_BUFFERABLE       4'b0011
`define AXI_ARCACHE_WRITE_THROUGH_NO_ALLOCATE             4'b1010
`define AXI_ARCACHE_WRITE_THROUGH_READ_ALLOCATE           4'b1110
`define AXI_ARCACHE_WRITE_THROUGH_WRITE_ALLOCATE          4'b1010
`define AXI_ARCACHE_WRITE_THROUGH_READ_AND_WRITE_ALLOCATE 4'b1110
`define AXI_ARCACHE_WRITE_BACK_NO_ALLOCATE                4'b1011
`define AXI_ARCACHE_WRITE_BACK_READ_ALLOCATE              4'b1111
`define AXI_ARCACHE_WRITE_BACK_WRITE_ALLOCATE             4'b1011
`define AXI_ARCACHE_WRITE_BACK_READ_AND_WRITE_ALLOCATE    4'b1111
// Memory types (AW)
`define AXI_AWCACHE_DEVICE_NON_BUFFERABLE                 4'b0000
`define AXI_AWCACHE_DEVICE_BUFFERABLE                     4'b0001
`define AXI_AWCACHE_NORMAL_NON_CACHEABLE_NON_BUFFERABLE   4'b0010
`define AXI_AWCACHE_NORMAL_NON_CACHEABLE_BUFFERABLE       4'b0011
`define AXI_AWCACHE_WRITE_THROUGH_NO_ALLOCATE             4'b0110
`define AXI_AWCACHE_WRITE_THROUGH_READ_ALLOCATE           4'b0110
`define AXI_AWCACHE_WRITE_THROUGH_WRITE_ALLOCATE          4'b1110
`define AXI_AWCACHE_WRITE_THROUGH_READ_AND_WRITE_ALLOCATE 4'b1110
`define AXI_AWCACHE_WRITE_BACK_NO_ALLOCATE                4'b0111
`define AXI_AWCACHE_WRITE_BACK_READ_ALLOCATE              4'b0111
`define AXI_AWCACHE_WRITE_BACK_WRITE_ALLOCATE             4'b1111
`define AXI_AWCACHE_WRITE_BACK_READ_AND_WRITE_ALLOCATE    4'b1111

`define AXI_SIZE_BYTES_1                                  3'b000
`define AXI_SIZE_BYTES_2                                  3'b001
`define AXI_SIZE_BYTES_4                                  3'b010
`define AXI_SIZE_BYTES_8                                  3'b011
`define AXI_SIZE_BYTES_16                                 3'b100
`define AXI_SIZE_BYTES_32                                 3'b101
`define AXI_SIZE_BYTES_64                                 3'b110
`define AXI_SIZE_BYTES_128                                3'b111